12 search results - page 3 / 3 » Designing Control Logic for Counterflow Pipeline Processor U... |
RSP
2008
IEEE
14 years 16 hour ago
2008
IEEE
ASIP-based implementations constitute a key trend in SoC design enabling optimal tradeoffs between performance and flexibility. This paper details a case study of an ASIP-based im...
TVLSI
2002
13 years 5 months ago
2002
In this paper, we propose a low-power approach to the design of embedded very long instruction word (VLIW) processor architectures based on the forwarding (or bypassing) hardware, ...