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» Designing Memory Subsystems Resilient to Process Variations
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LCTRTS
2004
Springer
13 years 10 months ago
Spinach: a liberty-based simulator for programmable network interface architectures
This paper presents Spinach, a new simulator toolset specifically designed to target programmable network interface architectures. Spinach models both system components that are ...
Paul Willmann, Michael Brogioli, Vijay S. Pai
ICCAD
2008
IEEE
153views Hardware» more  ICCAD 2008»
14 years 1 months ago
Breaking the simulation barrier: SRAM evaluation through norm minimization
— With process variation becoming a growing concern in deep submicron technologies, the ability to efficiently obtain an accurate estimate of failure probability of SRAM compone...
Lara Dolecek, Masood Qazi, Devavrat Shah, Anantha ...
17
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GECCO
2005
Springer
162views Optimization» more  GECCO 2005»
13 years 10 months ago
Evolution of Voronoi based fuzzy recurrent controllers
A fuzzy controller is usually designed by formulating the knowledge of a human expert into a set of linguistic variables and fuzzy rules. Among the most successful methods to auto...
Carlos Kavka, Patricia Roggero, Marc Schoenauer
CASES
2009
ACM
13 years 8 months ago
A fault tolerant cache architecture for sub 500mV operation: resizable data composer cache (RDC-cache)
In this paper we introduce Resizable Data Composer-Cache (RDC-Cache). This novel cache architecture operates correctly at sub 500 mV in 65 nm technology tolerating large number of...
Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, F...
IWMM
2011
Springer
206views Hardware» more  IWMM 2011»
12 years 7 months ago
A comprehensive evaluation of object scanning techniques
At the heart of all garbage collectors lies the process of identifying and processing reference fields within an object. Despite its key role, and evidence of many different impl...
Robin Garner, Stephen M. Blackburn, Daniel Frampto...