85 search results - page 4 / 17 » Designing Memory Subsystems Resilient to Process Variations |
CORR
2010
Springer
13 years 5 months ago
2010
Springer
Iterative algorithms aimed at solving some problems are discussed. For certain problems, such as finding a common point in the intersection of a finite number of convex sets, there...
DAC
2004
ACM
14 years 6 months ago
2004
ACM
timing analysis tools to replace standard deterministic static timing analyzers whereas [8,27] develop approaches for the statistical estimation of leakage power considering within...
DATE
2007
IEEE
13 years 12 months ago
2007
IEEE
Deep-submicron designs have to take care of process variation effects as variations in critical process parameters result in large variations in access latencies of hardware compo...
ICIP
2003
IEEE
14 years 7 months ago
2003
IEEE
For motion estimation (ME) and discrete cosine transform (DCT) of MPEG video encoding, content variation and perceptual tolerance in video signals can be exploited to gracefully t...
DSN
2007
IEEE
13 years 12 months ago
2007
IEEE
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...