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TVLSI
2016
52views more  TVLSI 2016»
4 years 6 months ago
Designing Tunable Subthreshold Logic Circuits Using Adaptive Feedback Equalization
—Ultralow-power subthreshold logic circuits are becoming prominent in embedded applications with limited energy budgets. Minimum energy consumption of digital logic circuits can ...
Mahmoud Zangeneh, Ajay Joshi
TIM
2010
294views Education» more  TIM 2010»
9 years 5 months ago
Standby Leakage Power Reduction Technique for Nanoscale CMOS VLSI Systems
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...
HeungJun Jeon, Yong-Bin Kim, Minsu Choi
VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
10 years 10 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood
CEC
2011
IEEE
8 years 10 months ago
Cost-benefit analysis of using heuristics in ACGP
—Constrained Genetic Programming (CGP) is a method of searching the Genetic Programming search space non-uniformly, giving preferences to certain subspaces according to some heur...
John W. Aleshunas, Cezary Z. Janikow
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