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» Designing a DHT for Low Latency and High Throughput
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NSDI
2004
13 years 5 months ago
Designing a DHT for Low Latency and High Throughput
Designing a wide-area distributed hash table (DHT) that provides high-throughput and low-latency network storage is a challenge. Existing systems have explored a range of solution...
Frank Dabek, Jinyang Li, Emil Sit, James Robertson...
VLSID
1993
IEEE
234views VLSI» more  VLSID 1993»
13 years 8 months ago
NPCPL: Normal Process Complementary Pass Transistor Logic for Low Latency, High Throughput Designs
High throughput and low latency designs are required in modern high performance systems, especially for signal processing applications. Existing logic families cannot provide both...
Debabrata Ghosh, S. K. Nandy, K. Parthasarathy, V....
NSDI
2008
13 years 6 months ago
UsenetDHT: A Low-Overhead Design for Usenet
Usenet is a popular distributed messaging and file sharing service: servers in Usenet flood articles over an overlay network to fully replicate articles across all servers. Howeve...
Emil Sit, Robert Morris, M. Frans Kaashoek
IAJIT
2010
107views more  IAJIT 2010»
13 years 2 months ago
Low Latency, High Throughput, and Less Complex VLSI Architecture for 2D-DFT
: This paper proposes a pipelined, systolic architecture for two- dimensional discrete Fourier transform computation which is highly concurrent. The architecture consists of two, o...
Sohil Shah, Preethi Venkatesan, Deepa Sundar, Muni...
ASYNC
2000
IEEE
86views Hardware» more  ASYNC 2000»
13 years 8 months ago
High-Throughput Asynchronous Pipelines for Fine-Grain Dynamic Datapaths
This paper introduces several new asynchronous pipeline designs which offer high throughput as well as low latency. The designs target dynamic datapaths, both dualrail as well as ...
Montek Singh, Steven M. Nowick