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» Detecting tangled logic structures in VLSI netlists
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DAC
2010
ACM
13 years 5 months ago
Detecting tangled logic structures in VLSI netlists
This work proposes a new problem of identifying large and tangled logic structures in a synthesized netlist. Large groups of cells that are highly interconnected to each other can...
Tanuj Jindal, Charles J. Alpert, Jiang Hu, Zhuo Li...
ISPD
1997
ACM
105views Hardware» more  ISPD 1997»
13 years 8 months ago
Regular layout generation of logically optimized datapaths
The inherent distortion of the structural regularity of VLSI datapaths after logic optimization has until now precluded dense regular layouts of optimized datapaths despite their ...
R. X. T. Nijssen, C. A. J. van Eijk
ISVLSI
2007
IEEE
107views VLSI» more  ISVLSI 2007»
13 years 10 months ago
A Hash-based Approach for Functional Regularity Extraction During Logic Synthesis
Performance, power, and functionality, yield and manufacturability are rapidly becoming additional critical factors that must be considered at higher levels of ion. A possible sol...
Angelo P. E. Rosiello, Fabrizio Ferrandi, Davide P...
ASPDAC
2007
ACM
129views Hardware» more  ASPDAC 2007»
13 years 8 months ago
ECO-system: Embracing the Change in Placement
In a realistic design flow, circuit and system optimizations must interact with physical aspects of the design. For example, improvements in timing and power may require replacing ...
Jarrod A. Roy, Igor L. Markov
ISVLSI
2006
IEEE
95views VLSI» more  ISVLSI 2006»
13 years 10 months ago
PLAs in Quantum-dot Cellular Automata
Abstract— Research in the fields of physics, chemistry and electronics has demonstrated that Quantum-dot Cellular Automata (QCA) is a viable alternative for nano-scale computing...
Xiaobo Sharon Hu, Michael Crocker, Michael T. Niem...