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ICCAD
2004
IEEE
14 years 1 months ago
2004
IEEE
In this paper we study the technology mapping problem for FPGA architectures to minimize chip area, or the total number of lookup tables (LUTs) of the mapped design, under the chi...
COMCOM
1998
13 years 4 months ago
1998
Multimedia applications involving digital audio and/or digital video transmissions require strict QoS constraints (end-to-end delay bound, bandwidth availability, packet loss rate...
DATE
2010
IEEE
13 years 3 months ago
2010
IEEE
Abstract—On-chip interconnection network is a crucial design component in high-performance System-on-Chips (SoCs). Many of previous works have focused on the automation of its to...
ISPD
2012
ACM
12 years 12 days ago
2012
ACM
In this paper, we propose a new approach for gated bus synthesis [16] with minimum wire capacitance per transaction in three-dimensional (3D) ICs. The 3D IC technology connects di...