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CAMP
2005
IEEE
13 years 10 months ago
Development of a Bit-Level Compiler for Massively Parallel Vision Chips
Abstract— An image sensor in which each pixel has a processing element is called a vision chip. The vision chip can perform real-time visual processing at a high frame rate of 10...
Takashi Komuro, Shingo Kagami, Masatoshi Ishikawa,...
ISCAS
2003
IEEE
144views Hardware» more  ISCAS 2003»
13 years 9 months ago
A flexible global readout architecture for an analogue SIMD vision chip
A new vision chip, SCAMP-2, has been developed in a 0.35µm CMOS technology. In this paper, the design of the chip is presented, with particular emphasis on its readout architectu...
Piotr Dudek
ICVS
2001
Springer
13 years 9 months ago
Compiling SA-C Programs to FPGAs: Performance Results
Abstract. At the first ICVS, we presented SA-C (“sassy”), a singleassignment variant of the C programming language designed to exploit both coarse-grain and fine-grain parallel...
Bruce A. Draper, A. P. Wim Böhm, Jeffrey Hamm...