3 search results - page 1 / 1 » Device-level early floorplanning algorithms for RF circuits |
ISPD
1998
ACM
13 years 9 months ago
1998
ACM
—High-frequency circuits are notoriously difficult to lay out because of the tight coupling between device-level placement and wiring. Given that successful electrical performan...
DAC
2008
ACM
14 years 5 months ago
2008
ACM
In this paper, we present DeFer -- a fast, high-quality and nonstochastic fixed-outline floorplanning algorithm. DeFer generates a non-slicing floorplan by compacting a slicing fl...
JETC
2008
13 years 3 months ago
2008
With aggressive reductions in feature sizes and the integration of multiple functionalities on the same die, bottlenecks due to I/O pin limitations have become a severe issue in to...