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PPOPP
2010
ACM
14 years 2 months ago
Data transformations enabling loop vectorization on multithreaded data parallel architectures
Loop vectorization, a key feature exploited to obtain high performance on Single Instruction Multiple Data (SIMD) vector architectures, is significantly hindered by irregular memo...
Byunghyun Jang, Perhaad Mistry, Dana Schaa, Rodrig...
WETICE
2003
IEEE
13 years 10 months ago
A Network Worm Vaccine Architecture
The ability of worms to spread at rates that effectively preclude human-directed reaction has elevated them to a first-class security threat to distributed systems. We present th...
Stelios Sidiroglou, Angelos D. Keromytis
PLDI
2004
ACM
13 years 10 months ago
Vectorization for SIMD architectures with alignment constraints
When vectorizing for SIMD architectures that are commonly employed by today’s multimedia extensions, one of the new challenges that arise is the handling of memory alignment. Pr...
Alexandre E. Eichenberger, Peng Wu, Kevin O'Brien
EUROPAR
2009
Springer
13 years 9 months ago
Dynamic Detection of Uniform and Affine Vectors in GPGPU Computations
Abstract. We present a hardware mechanism which dynamically detects uniform and affine vectors used in Graphics Processing Units, to minimize pressure on the register file and redu...
Sylvain Collange, David Defour, Yao Zhang
IPPS
2003
IEEE
13 years 10 months ago
Short Vector Code Generation for the Discrete Fourier Transform
In this paper we use a mathematical approach to automatically generate high performance short vector code for the discrete Fourier transform (DFT). We represent the well-known Coo...
Franz Franchetti, Markus Püschel