6 search results - page 1 / 2 » Does Hardware Configuration and Processor Load Impact Softwa... |
ICST
2010
IEEE
13 years 3 months ago
2010
IEEE
Intermittent failures and nondeterministic behavior complicate and compromise the effectiveness of software testing and debugging. To increase the observability of software faults,...
CSMR
2010
IEEE
12 years 11 months ago
2010
IEEE
To avoid unnecessary maintenance costs in large IT systems resulting from poorly planned changes, it is essential to manage and control changes to the system and to verify that all...
ICS
2007
Tsinghua U.
13 years 10 months ago
2007
Tsinghua U.
Software or hardware data cache prefetching is an efficient way to hide cache miss latency. However effectiveness of the issued prefetches have to be monitored in order to maximi...
IEEEPACT
2002
IEEE
13 years 9 months ago
2002
IEEE
Java exception checks are designed to ensure that any faulting instruction causing a hardware exception does not terminate the program abnormally. These checks, however, impose so...
ERSA
2004
13 years 5 months ago
2004
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...