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ET
2007
111views more  ET 2007»
13 years 4 months ago
Dynamic Fault Diagnosis of Combinational and Sequential Circuits on Reconfigurable Hardware
This article describes an emulation-based method for locating stuck-at faults in combinational and synchronous sequential circuits. The method is based on automatically designing a...
Fatih Kocan, Daniel G. Saab
ASPDAC
2006
ACM
144views Hardware» more  ASPDAC 2006»
13 years 10 months ago
Compaction of pass/fail-based diagnostic test vectors for combinational and sequential circuits
Abstract— Substantial attention is being paid to the fault diagnosis problem in recent test literature. Yet, the compaction of test vectors for fault diagnosis is little explored...
Yoshinobu Higami, Kewal K. Saluja, Hiroshi Takahas...
DFT
2003
IEEE
117views VLSI» more  DFT 2003»
13 years 9 months ago
Fault Tolerant Design of Combinational and Sequential Logic Based on a Parity Check Code
We describe a method for designing fault tolerant circuits based on an extension of a Concurrent Error Detection (CED) technique. The proposed extension combines parity check code...
Sobeeh Almukhaizim, Yiorgos Makris
ICCAD
1997
IEEE
125views Hardware» more  ICCAD 1997»
13 years 8 months ago
A deductive technique for diagnosis of bridging faults
A deductive technique is presented that uses voltage testing for the diagnosis of single bridging faults between two gate input or output lines and is applicable to combinational ...
Srikanth Venkataraman, W. Kent Fuchs
ICCAD
1998
IEEE
75views Hardware» more  ICCAD 1998»
13 years 8 months ago
A fast, accurate, and non-statistical method for fault coverage estimation
We present a fast, dynamic fault coverage estimation technique for sequential circuits that achieves high degrees of accuracy by signi cantly reducing the number of injected fault...
Michael S. Hsiao