49 search results - page 1 / 10 » Dynamic Register Renaming Through Virtual-Physical Registers |
JILP
2000
13 years 4 months ago
2000
Register file access time represents one of the critical delays of current microprocessors, and it is expected to become more critical as future processors increase the instructio...
HPCA
1998
IEEE
13 years 8 months ago
1998
IEEE
A novel dynamic register renaming approach is proposed in this work. The key idea of the novel scheme is to delay the allocation of physical registers until a late stage in the pi...
ACSC
2004
IEEE
13 years 8 months ago
2004
IEEE
When modern processors keep increasing the instruction window size and the issue width to exploit more instruction-level parallelism (ILP), the demand of larger physical register ...
IEEEPACT
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper presents a novel compiler directed technique to reduce the register pressure and power of the register file by releasing registers early. The compiler identifies regi...
MICRO
1993
IEEE
13 years 8 months ago
1993
IEEE
In this paper, we present a novel mechanism that implements register renaming, dynamic speculation and precise interrupts. Renaming of registers is performed during the instructio...