7 search results - page 2 / 2 » Dynamic VTH Scaling Scheme for Active Leakage Power Reductio... |
DAC
2006
ACM
14 years 6 months ago
2006
ACM
Substantial increase in leakage current and threshold voltage fluctuations are making design of robust wide fan-in dynamic gates a challenging task. Traditionally, a PMOS keeper t...
MICRO
2005
IEEE
13 years 11 months ago
2005
IEEE
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...