9 search results - page 1 / 2 » Dynamic Virtual Ground Voltage Estimation for Power Gating |
Publication
With the technology moving into the deep sub-100nm region, the increase of leakage power consumption necessitates more aggressive power reduction techniques. Power gating is a prom...
TCAD
2008
13 years 4 months ago
2008
Abstract--Design of a suitable power gating (e.g., multithreshold CMOS or super cutoff CMOS) structure is an important and challenging task in sub-90nm VLSI circuits where leakage ...
DAC
2006
ACM
14 years 5 months ago
2006
ACM
Power Gating is effective for reducing leakage power. Previously, a Distributed Sleep Transistor Network (DSTN) was proposed to reduce the sleep transistor area by connecting all ...
ICCAD
2009
IEEE
2009
IEEE
An efficient wakeup scheduling considering resource constraint for sensor-based power gating designs
13 years 2 months ago
Power gating has been a very effective way to reduce leakage power. One important design issue for a power gating design is to limit the surge current during the wakeup process. N...
ICCD
2008
IEEE
14 years 1 months ago
2008
IEEE
—Dynamic voltage scaling (DVS) provides power savings for systems with varying performance requirements. One low overhead implementation of DVS uses PMOS power switches to connec...