47 search results - page 7 / 10 » Dynamic Voltage and Frequency Scaling for Power- Constrained... |
ICCAD
2010
IEEE
13 years 3 months ago
2010
IEEE
3D stacked circuits reduce communication delay in multicore system-on-chips (SoCs) and enable heterogeneous integration of cores, memories, sensors, and RF devices. However, vertic...
ISCA
2003
IEEE
13 years 11 months ago
2003
IEEE
With power density and hence cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for runtime processo...
CODES
2005
IEEE
13 years 11 months ago
2005
IEEE
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
MICRO
2009
IEEE
14 years 12 days ago
2009
IEEE
Many-core scaling now faces a power wall. The gap between the number of cores that fit on a die and the number that can operate simultaneously under the power budget is rapidly i...
ISLPED
2003
ACM
13 years 11 months ago
2003
ACM
Enabled by the continuous advancement in fabrication technology, present day synchronous microprocessors include more than 100 million transistors and have clock speeds well in ex...