25 search results - page 3 / 5 » Dynamic hardware plugins in an FPGA with partial run-time re... |
IPPS
2006
IEEE
13 years 10 months ago
2006
IEEE
The development of Field Programmable Gate Arrays (FPGAs) had tremendous improvements in the last few years. They were extended from simple logic circuits to complex Systems-on-Ch...
IJES
2006
13 years 4 months ago
2006
This paper describes novel methods of exploiting the partial, dynamic reconfiguration capabilities of Xilinx Virtex V1000 FPGAs to manage single-event upset (SEU) faults due to rad...
WOB
2004
13 years 5 months ago
2004
ABSTRACT. Reconfigurable systolic arrays can be adapted to efficiently resolve a wide spectrum of computational problems; parallelism is naturally explored in systolic arrays and r...
DSD
2010
IEEE
13 years 2 months ago
2010
IEEE
Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible natur...
DAGSTUHL
2006
13 years 6 months ago
2006
Dynamic and partial reconfiguration discovers more and more the focus in academic and industrial research. Modern systems in e.g. avionic and automotive applications exploit the p...