65 search results - page 1 / 13 » Dynamic power-performance adaptation of parallel computation... |
HPCA
2006
IEEE
14 years 5 months ago
2006
IEEE
Previous proposals for power-aware thread-level parallelism on chip multiprocessors (CMPs) mostly focus on multiprogrammed workloads. Nonetheless, parallel computation of a single...
EUROPAR
2007
Springer
13 years 8 months ago
2007
Springer
How can sequential applications benefit from the ubiquitous next generation of chip multiprocessors (CMP)? Part of the answer may be a dynamic execution environment that automatica...
ICDCS
2010
IEEE
13 years 6 months ago
2010
IEEE
—Server consolidation based on virtualization is a key ingredient for improving power efficiency and resource utilization in cloud computing infrastructures. However, to provide...
HPCA
2007
IEEE
13 years 11 months ago
2007
IEEE
The significant speed-gap between processor and memory and the limited chip memory bandwidth make last-level cache performance crucial for future chip multiprocessors. To use the...
IPPS
2005
IEEE
13 years 10 months ago
2005
IEEE
The next generation of mobile systems with multimedia processing capabilities and wireless connectivity will be increasingly deployed in highly dynamic and distributed environment...