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COMPUTER
2000
138views more  COMPUTER 2000»
10 years 2 months ago
Making Pointer-Based Data Structures Cache Conscious
Processor and memory technology trends portend a continual increase in the relative cost of accessing main memory. Machine designers have tried to mitigate the effect of this tren...
Trishul M. Chilimbi, Mark D. Hill, James R. Larus
DEXA
2001
Springer
151views Database» more  DEXA 2001»
10 years 7 months ago
Cache Conscious Clustering C3
The two main techniques of improving I/O performance of Object Oriented Database Management Systems(OODBMS) are clustering and buffer replacement. Clustering is the placement of o...
Zhen He, Alonso Marquez
ASPDAC
2011
ACM
297views Hardware» more  ASPDAC 2011»
9 years 6 months ago
CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequent...
Shashikanth Bobba, Ashutosh Chakraborty, Olivier T...
ICN
2005
Springer
10 years 8 months ago
Eliminating the Performance Anomaly of 802.11b
Abstract. In this paper, we propose a mechanism to eliminate the performance anomaly of IEEE 802.11b. Performance anomaly happens when nodes that have diļ¬€erent transmission rates...
See-hwan Yoo, Jin-Hee Choi, Jae-Hyun Hwang, Chuck ...
IPCCC
2005
IEEE
10 years 8 months ago
Performance evaluations for hybrid IEEE 802.11b and 802.11g wireless networks
The IEEE 802.11g standard has been proposed to enhance the data rate of wireless LAN connections up to 54Mbps, while ensuring backward compatibility with legacy 802.11b devices at...
Shao-Cheng Wang, Y.-M. Chen, Tsern-Huei Lee, Ahmed...
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