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» Effective Bit-Width and Under-Approximation
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EUROCAST
2009
Springer
143views Hardware» more  EUROCAST 2009»
10 years 11 months ago
Effective Bit-Width and Under-Approximation
Robert Brummayer, Armin Biere
VLSID
2005
IEEE
140views VLSI» more  VLSID 2005»
11 years 4 months ago
Variable Resizing for Area Improvement in Behavioral Synthesis
High level synthesis tools transform an algorithmic description to a register transfer language (RTL) description of the hardware. The algorithm behavior is typically described in...
R. Gopalakrishnan, Rajat Moona
DAC
2003
ACM
10 years 9 months ago
Determining appropriate precisions for signals in fixed-point IIR filters
This paper presents an analytical framework for the implementation of digital infinite impulse response filters in fixed-point hardware on field programmable gate arrays. This ana...
Joan Carletta, Robert J. Veillette, Frederick W. K...
HPCA
2005
IEEE
11 years 4 months ago
A Small, Fast and Low-Power Register File by Bit-Partitioning
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...
Masaaki Kondo, Hiroshi Nakamura
MICRO
2002
IEEE
118views Hardware» more  MICRO 2002»
10 years 9 months ago
Exploiting data-width locality to increase superscalar execution bandwidth
In a 64-bit processor, many of the data values actually used in computations require much narrower data-widths. In this study, we demonstrate that instruction data-widths exhibit ...
Gabriel H. Loh
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