7 search results - page 1 / 2 » Effective Bit-Width and Under-Approximation |
EUROCAST
2009
Springer
13 years 11 months ago
2009
Springer
VLSID
2005
IEEE
14 years 4 months ago
2005
IEEE
High level synthesis tools transform an algorithmic description to a register transfer language (RTL) description of the hardware. The algorithm behavior is typically described in...
DAC
2003
ACM
13 years 9 months ago
2003
ACM
This paper presents an analytical framework for the implementation of digital infinite impulse response filters in fixed-point hardware on field programmable gate arrays. This ana...
HPCA
2005
IEEE
14 years 4 months ago
2005
IEEE
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...
MICRO
2002
IEEE
13 years 9 months ago
2002
IEEE
In a 64-bit processor, many of the data values actually used in computations require much narrower data-widths. In this study, we demonstrate that instruction data-widths exhibit ...