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» Effective Software Self-Test Methodology for Processor Cores
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ISPASS
2010
IEEE
14 years 20 days ago
Cache contention and application performance prediction for multi-core systems
—The ongoing move to chip multiprocessors (CMPs) permits greater sharing of last-level cache by processor cores but this sharing aggravates the cache contention problem, potentia...
Chi Xu, Xi Chen, Robert P. Dick, Zhuoqing Morley M...
AVI
2004
13 years 7 months ago
ValueCharts: analyzing linear models expressing preferences and evaluations
In this paper we propose ValueCharts, a set of visualizations and interactive techniques intended to support decision-makers in inspecting linear models of preferences and evaluat...
Giuseppe Carenini, John Loyd
MICRO
2007
IEEE
164views Hardware» more  MICRO 2007»
14 years 2 days ago
A Practical Approach to Exploiting Coarse-Grained Pipeline Parallelism in C Programs
The emergence of multicore processors has heightened the need for effective parallel programming practices. In addition to writing new parallel programs, the next generation of pr...
William Thies, Vikram Chandrasekhar, Saman P. Amar...
POPL
2009
ACM
14 years 6 months ago
Feedback-directed barrier optimization in a strongly isolated STM
Speed improvements in today's processors have largely been delivered in the form of multiple cores, increasing the importance of ions that ease parallel programming. Software...
Nathan Grasso Bronson, Christos Kozyrakis, Kunle O...
HIPEAC
2010
Springer
14 years 2 months ago
Maestro: Orchestrating Lifetime Reliability in Chip Multiprocessors
As CMOS feature sizes venture deep into the nanometer regime, wearout mechanisms including negative-bias temperature instability and timedependent dielectric breakdown can severely...
Shuguang Feng, Shantanu Gupta, Amin Ansari, Scott ...