23 search results - page 1 / 5 » Effective instruction scheduling techniques for an interleav... |
MICRO
2002
IEEE
13 years 9 months ago
2002
IEEE
Clustering is a common technique to overcome the wire delay problem incurred by the evolution of technology. Fully-distributed architectures, where the register file, the functio...
MICRO
2003
IEEE
13 years 10 months ago
2003
IEEE
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...
IPPS
2000
IEEE
13 years 9 months ago
2000
IEEE
In a machine that follows the dynamically trace scheduled VLIW (DTSVLIW) architecture, VLIW instructions are built dynamically through an algorithm that can be implemented in hard...
DAC
2002
ACM
14 years 5 months ago
2002
ACM
Aim of this paper is to propose a methodology for the definition of an instruction-level energy estimation framework for VLIW (Very Long Instruction Word) processors. The power mo...
HPCC
2009
Springer
13 years 9 months ago
2009
Springer
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...