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CAV
2009
Springer
177views Hardware» more  CAV 2009»
14 years 5 months ago
Software Transactional Memory on Relaxed Memory Models
Abstract. Pseudo-code descriptions of STMs assume sequentially consistent program execution and atomicity of high-level STM operations like read, write, and commit. These assumptio...
Rachid Guerraoui, Thomas A. Henzinger, Vasu Singh
DC
2010
13 years 1 months ago
Rambo: a robust, reconfigurable atomic memory service for dynamic networks
In this paper, we present RAMBO, an algorithm for emulating a read/write distributed shared memory in a dynamic, rapidly changing environment. RAMBO provides a highly reliable, hi...
Seth Gilbert, Nancy A. Lynch, Alexander A. Shvarts...
HPCA
1996
IEEE
13 years 9 months ago
Telegraphos: High-Performance Networking for Parallel Processing on Workstation Clusters
Networks of workstations and high-performance microcomputers have been rarely used for running highperformance applicationslike multimedia, simulations,scientific and engineering ...
Evangelos P. Markatos, Manolis Katevenis
JSS
2008
91views more  JSS 2008»
13 years 5 months ago
A parametrized algorithm that implements sequential, causal, and cache memory consistencies
In this paper, we present an algorithm that can be used to implement sequential, causal, or cache consistency in distributed shared memory (DSM) systems. For this purpose it inclu...
Ernesto Jiménez, Antonio Fernández, ...