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MICRO
2006
IEEE
113views Hardware» more  MICRO 2006»
13 years 5 months ago
Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers
We examine the ability of CMPs, due to their lower onchip communication latencies, to exploit data parallelism at inner-loop granularities similar to that commonly targeted by vec...
Jack Sampson, Rubén González, Jean-F...
BROADNETS
2006
IEEE
13 years 11 months ago
An Energy Efficient and Accurate Slot Synchronization Scheme for Wireless Sensor Networks
Existing slotted channel access schemes in wireless networks assume that slot boundaries at all nodes are synchronized. In practice, relative clock drifts among nodes cause slot mi...
Lillian Dai, Prithwish Basu, Jason Redi
ICDCN
2012
Springer
12 years 26 days ago
Lifting the Barriers - Reducing Latencies with Transparent Transactional Memory
Synchronization in distributed systems is expensive because, in general, threads must stall to obtain a lock or to operate on volatile data. Transactional memory, on the other hand...
Annette Bieniusa, Thomas Fuhrmann
OSDI
2004
ACM
14 years 5 months ago
Energy-Efficiency and Storage Flexibility in the Blue File System
A fundamental vision driving pervasive computing research is access to personal and shared data anywhere at anytime. In many ways, this vision is close to being realized. Wireless...
Edmund B. Nightingale, Jason Flinn
MOBIHOC
2008
ACM
14 years 4 months ago
Strong barrier coverage of wireless sensor networks
Constructing sensor barriers to detect intruders crossing a randomly-deployed sensor network is an important problem. Early results have shown how to construct sensor barriers to ...
Benyuan Liu, Olivier Dousse, Jie Wang, Anwar Saipu...