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» Efficient DC Fault Simulation of Nonlinear Analog Circuits
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DATE
2002
IEEE
98views Hardware» more  DATE 2002»
13 years 10 months ago
A Test Design Method for Floating Gate Defects (FGD) in Analog Integrated Circuits
A unified approach to fault simulation for FGDs is introduced. Instead of a direct fault simulation, the proposed approach calculates indirectly from the simulator output the set...
Michael Pronath, Helmut E. Graeb, Kurt Antreich
ICCAD
2009
IEEE
159views Hardware» more  ICCAD 2009»
13 years 3 months ago
First steps towards SAT-based formal analog verification
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
Saurabh K. Tiwary, Anubhav Gupta, Joel R. Phillips...
CHINAF
2006
110views more  CHINAF 2006»
13 years 5 months ago
Time-domain analysis methodology for large-scale RLC circuits and its applications
: With soaring work frequency and decreasing feature sizes, VLSI circuits with RLC parasitic components are more like analog circuits and should be carefully analyzed in physical d...
Zuying Luo, Yici Cai, Sheldon X.-D. Tan, Xianlong ...
ICCAD
2000
IEEE
100views Hardware» more  ICCAD 2000»
13 years 9 months ago
Partial Simulation-Driven ATPG for Detection and Diagnosis of Faults in Analog Circuits
In this paper, we propose a novel fault-oriented test generation methodology for detection and isolation of faults in analog circuits. Given the description of the circuit-underte...
Sudip Chakrabarti, Abhijit Chatterjee
EH
2005
IEEE
158views Hardware» more  EH 2005»
13 years 11 months ago
Hardware Evolution of Analog Circuits for In-situ Robotic Fault-Recovery
We present a method for evolving and implementing artificial neural networks (ANNs) on Field Programmable Analog Arrays (FPAAs). These FPAAs offer the small size and low power usa...
Dmitry Berenson, Nicolás S. Estévez,...