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IPPS
2005
IEEE
13 years 11 months ago
Technology-based Architectural Analysis of Operand Bypass Networks for Efficient Operand Transport
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
Hongkyu Kim, D. Scott Wills, Linda M. Wills
SPAA
2003
ACM
13 years 10 months ago
Quantifying instruction criticality for shared memory multiprocessors
Recent research on processor microarchitecture suggests using instruction criticality as a metric to guide hardware control policies. Fields et al. [3, 4] have proposed a directed...
Tong Li, Alvin R. Lebeck, Daniel J. Sorin
BMCBI
2010
218views more  BMCBI 2010»
13 years 3 months ago
A hybrid blob-slice model for accurate and efficient detection of fluorescence labeled nuclei in 3D
Background: To exploit the flood of data from advances in high throughput imaging of optically sectioned nuclei, image analysis methods need to correctly detect thousands of nucle...
Anthony Santella, Zhuo Du, Sonja Nowotschin, Anna-...
EOR
2008
103views more  EOR 2008»
13 years 5 months ago
New complexity analysis of IIPMs for linear optimization based on a specific self-regular function
Primal-dual Interior-Point Methods (IPMs) have shown their ability in solving large classes of optimization problems efficiently. Feasible IPMs require a strictly feasible startin...
Maziar Salahi, M. Reza Peyghami, Tamás Terl...
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
13 years 11 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...