1259 search results - page 2 / 252 » Efficient Wire Formats for High Performance Computing |
ISJGP
2007
13 years 5 months ago
2007
Abstract Recent advances in mobile computing and wireless communication technologies are enabling high mobility and flexibility of anytime, anywhere service access for mobile us...
ISLPED
1996
ACM
13 years 9 months ago
1996
ACM
In this paper, we study the simultaneous buffer and wire sizing (SBWS) problem for delay and power dissipation minimization. We prove the BS/WS relation for optimal SBWS solutions...
ANCS
2008
ACM
13 years 7 months ago
2008
ACM
Today's routers need to perform packet classification at wire speed in order to provide critical services such as traffic billing, priority routing and blocking unwanted Inte...
TC
2008
13 years 5 months ago
2008
Compared to higher-precision data formats, lower-precision data formats result in higher performance for computationally intensive applications on FPGAs because of their lower res...
HPCA
2005
IEEE
13 years 11 months ago
2005
IEEE
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...