Sciweavers

32 search results - page 1 / 7
» Efficient dynamic voltage frequency scaling through algorith...
Sort
View
CODES
2009
IEEE
13 years 5 months ago
Efficient dynamic voltage/frequency scaling through algorithmic loop transformation
We present a novel loop transformation technique, particularly well suited for optimizing embedded compilers, where an increase in compilation time is acceptable in exchange for s...
Mohammad Ali Ghodrat, Tony Givargis
PACS
2000
Springer
110views Hardware» more  PACS 2000»
13 years 8 months ago
Compiler-Directed Dynamic Frequency and Voltage Scheduling
Dynamic voltage and frequency scaling has been identified as one of the most effective ways to reduce power dissipation. This paper discusses a compilation strategy that identifies...
Chung-Hsing Hsu, Ulrich Kremer, Michael S. Hsiao
ISCAS
1999
IEEE
113views Hardware» more  ISCAS 1999»
13 years 8 months ago
Energy efficient software through dynamic voltage scheduling
The energy usage of computer systems is becoming important, especially for portablebattery-operated applications and embedded systems. A significant reduction in the energy consum...
Gangadhar Konduri, James Goodman, Anantha Chandrak...
VLSID
2004
IEEE
181views VLSI» more  VLSID 2004»
14 years 4 months ago
Real Time Dynamic Voltage Scaling For Embedded Systems
This paper presents a very efficient and versatile method to handle Dynamic Voltage Scaling for minimizing energy consumption in an embedded system processor while maintaining rea...
Venkat Rao, Gaurav Singhal, Anshul Kumar
ISPASS
2009
IEEE
13 years 11 months ago
User- and process-driven dynamic voltage and frequency scaling
We describe and evaluate two new, independently-applicable power reduction techniques for power management on processors that support dynamic voltage and frequency scaling (DVFS):...
Bin Lin, Arindam Mallik, Peter A. Dinda, Gokhan Me...