13 search results - page 1 / 3 » Efficient exploration of on-chip bus architectures and memor... |
VLSID
2006
IEEE
14 years 4 months ago
2006
IEEE
The two dominant architectural choices for implementing efficient communication fabrics for SoC's have been transaction-based buses and packet-based Networks-onChip (NoC). Bo...
CAL
2008
13 years 4 months ago
2008
Network-on-Chips (NoCs) outperform buses in terms of scalability, parallelism and system modularity and therefore are considered as the main interconnect infrastructure in future c...
CODES
2004
IEEE
13 years 8 months ago
2004
IEEE
Separation between computation and communication in system design allows the system designer to explore the communication architecture independently of component selection and map...
CODES
2007
IEEE
13 years 10 months ago
2007
IEEE
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the targ...
CODES
2003
IEEE
13 years 9 months ago
2003
IEEE
In this paper, we are concerned about the performance estimation of bus-based architectures assuming that the task partitioning on the processing components is already determined....