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ISCA
2010
IEEE
229views Hardware» more  ISCA 2010»
13 years 4 months ago
Understanding sources of inefficiency in general-purpose chips
Due to their high volume, general-purpose processors, and now chip multiprocessors (CMPs), are much more cost effective than ASICs, but lag significantly in terms of performance a...
Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Az...
ESTIMEDIA
2009
Springer
14 years 18 days ago
Software parallel CAVLC encoder based on stream processing
—Real-time encoding of high-definition H.264 video is a challenge to current embedded programmable processors. Emerging stream processing methods supported by most GPUs and progr...
Ju Ren, Yi He, Wei Wu, Mei Wen, Nan Wu, Chunyuan Z...
CCR
2004
153views more  CCR 2004»
13 years 5 months ago
Tree bitmap: hardware/software IP lookups with incremental updates
IP address lookup is challenging for high performance routers because it requires a longest matching prefix at speeds of up to 10 Gbps (OC-192). Existing solutions have poor updat...
Will Eatherton, George Varghese, Zubin Dittia
SIGCOMM
2006
ACM
13 years 12 months ago
Algorithms to accelerate multiple regular expressions matching for deep packet inspection
There is a growing demand for network devices capable of examining the content of data packets in order to improve network security and provide application-specific services. Most...
Sailesh Kumar, Sarang Dharmapurikar, Fang Yu, Patr...
SIGGRAPH
2000
ACM
13 years 10 months ago
The WarpEngine: an architecture for the post-polygonal age
We present the WarpEngine, an architecture designed for realtime image-based rendering of natural scenes from arbitrary viewpoints. The modeling primitives are real-world images w...
Voicu Popescu, John G. Eyles, Anselmo Lastra, Josh...