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» Efficient minimization of fully testable 2-SPP networks
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DDECS
2008
IEEE
185views Hardware» more  DDECS 2008»
13 years 11 months ago
Fast Boolean Minimizer for Completely Specified Functions
: We propose a simple and fast two-level minimization algorithm for completely specified functions in this paper. The algorithm is based on processing ternary trees. A ternary tree...
Petr Fiser, Pemysl Rucký, Irena Vanov&aacut...
ICDE
2006
IEEE
186views Database» more  ICDE 2006»
14 years 6 months ago
Energy-Efficient Continuous Isoline Queries in Sensor Networks
Environmental monitoring is a promising application for sensor networks. Many scenarios produce geographically correlated readings, making them visually interesting and good targe...
Adam Silberstein, Jun Yang 0001, Rebecca Braynard
3DIC
2009
IEEE
146views Hardware» more  3DIC 2009»
14 years 4 days ago
A routerless system level interconnection network for 3D integrated systems
- This paper describes a new architectural paradigm for fully connected, single-hop system level interconnection networks. The architecture is scalable enough to meet the needs of ...
Kelli Ireland, Donald M. Chiarulli, Steven P. Levi...
TMC
2010
100views more  TMC 2010»
13 years 3 months ago
Optimal Relay Station Placement in Broadband Wireless Access Networks
—To satisfy the stringent requirement of capacity enhancement in wireless networks, cooperative relaying is envisioned as one of the most effective solutions. In this paper, we s...
Bin Lin, Pin-Han Ho, Liang-Liang Xie, Xuemin (Sher...
HPCA
2003
IEEE
14 years 5 months ago
A Methodology for Designing Efficient On-Chip Interconnects on Well-Behaved Communication Patterns
As the level of chip integration continues to advance at a fast pace, the desire for efficient interconnects-whether on-chip or off-chip--is rapidly increasing. Traditional interc...
Wai Hong Ho, Timothy Mark Pinkston