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CODES
2005
IEEE
13 years 10 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
KAIS
2008
114views more  KAIS 2008»
13 years 4 months ago
A new concise representation of frequent itemsets using generators and a positive border
A complete set of frequent itemsets can get undesirably large due to redundancy when the minimum support threshold is low or when the database is dense. Several concise representat...
Guimei Liu, Jinyan Li, Limsoon Wong
VIS
2007
IEEE
239views Visualization» more  VIS 2007»
14 years 6 months ago
Moment Invariants for the Analysis of 2D Flow Fields
We present a novel approach for analyzing two-dimensional (2D) flow field data based on the idea of invariant moments. Moment invariants have traditionally been used in computer vi...
Michael Schlemmer, Manuel Heringer, Florian Morr...
AICCSA
2008
IEEE
216views Hardware» more  AICCSA 2008»
13 years 5 months ago
Mining fault tolerant frequent patterns using pattern growth approach
Mining fault tolerant (FT) frequent patterns from transactional datasets are very complex than mining all frequent patterns (itemsets), in terms of both search space exploration a...
Shariq Bashir, Zahid Halim, Abdul Rauf Baig