26 search results - page 1 / 6 » Employing Register Channels for the Exploitation of Instruct... |
PPOPP
1990
ACM
13 years 8 months ago
1990
ACM
Abstract - A multiprocessor system capable of exploiting fine-grained parallelism must support efficient synchronization and data passing mechanisms. This paper demonstrates the us...
MICRO
1998
IEEE
13 years 9 months ago
1998
IEEE
Three dimensional (3D) graphics applications have become very important workloads running on today's computer systems. A cost-effective graphics solution is to perform geomet...
ASAP
2004
IEEE
13 years 8 months ago
2004
IEEE
Large register file with multiple ports is a critical component of a high-performance processor. A large number of registers are necessary for processing a larger number of in-fli...
MICRO
2000
IEEE
13 years 4 months ago
2000
IEEE
High-performance microprocessors are currently designed to exploit the inherent instruction level parallelism (ILP) available in most applications. The techniques used in their de...
ACSC
2004
IEEE
13 years 8 months ago
2004
IEEE
When modern processors keep increasing the instruction window size and the issue width to exploit more instruction-level parallelism (ILP), the demand of larger physical register ...