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FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
13 years 6 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
EJWCN
2010
162views more  EJWCN 2010»
13 years 19 days ago
OMNeT++-Based Cross-Layer Simulator for Content Transmission over Wireless Ad Hoc Networks
Flexbility and deployment simplicity are among the numerous advantages of wireless links when compared to standard wired communications. However, challenges do remain high for wire...
Raphaël Massin, Catherine Lamy-Bergot, Christ...
ASPLOS
2012
ACM
12 years 1 months ago
Reflex: using low-power processors in smartphones without knowing them
To accomplish frequent, simple tasks with high efficiency, it is necessary to leverage low-power, microcontroller-like processors that are increasingly available on mobile systems...
Felix Xiaozhu Lin, Zhen Wang, Robert LiKamWa, Lin ...
HPDC
2009
IEEE
14 years 15 days ago
Maintaining reference graphs of globally accessible objects in fully decentralized distributed systems
Since the advent of electronic computing, the processors’ clock speed has risen tremendously. Now that energy efficiency requirements have stopped that trend, the number of proc...
Björn Saballus, Thomas Fuhrmann
MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
14 years 1 days ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August