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ACMMSP
2004
ACM
92views Hardware» more  ACMMSP 2004»
13 years 10 months ago
Instruction combining for coalescing memory accesses using global code motion
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatan...
ASPLOS
2010
ACM
13 years 8 months ago
Micro-pages: increasing DRAM efficiency with locality-aware data placement
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
Kshitij Sudan, Niladrish Chatterjee, David Nellans...
ASPLOS
2011
ACM
12 years 9 months ago
Pocket cloudlets
Cloud services accessed through mobile devices suffer from high network access latencies and are constrained by energy budgets dictated by the devices’ batteries. Radio and batt...
Emmanouil Koukoumidis, Dimitrios Lymberopoulos, Ka...
MOBISYS
2009
ACM
14 years 5 months ago
Leveraging smart phones to reduce mobility footprints
Mobility footprint refers to the size, weight, and energy demand of the hardware that must be carried by a mobile user to be effective at any time and place. The ideal of a zero m...
Stephen Smaldone, Benjamin Gilbert, Nilton Bila, L...
CASES
2003
ACM
13 years 10 months ago
A low-power accelerator for the SPHINX 3 speech recognition system
Accurate real-time speech recognition is not currently possible in the mobile embedded space where the need for natural voice interfaces is clearly important. The continuous natur...
Binu K. Mathew, Al Davis, Zhen Fang