149 search results - page 3 / 30 » Energy exploration and reduction of SDRAM memory systems |
DAC
1999
ACM
14 years 6 months ago
1999
ACM
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...
ASPDAC
2004
ACM
13 years 11 months ago
2004
ACM
— For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. In particular, software controlled ...
CC
2007
Springer
13 years 12 months ago
2007
Springer
This paper presents a compiler technique that reduces the energy consumption of the memory subsystem, for an off-chip partitioned memory architecture having multiple memory banks ...
ESTIMEDIA
2009
Springer
13 years 3 months ago
2009
Springer
Abstract--Memory accesses are a major cause of energy consumption for embedded systems and the stack is a frequent target for data accesses. This paper presents a fully software te...
ISLPED
2010
ACM
13 years 6 months ago
2010
ACM
The on-chip memory is a dominant source of power and energy consumption in modern and future processors. This paper explores the use of a new emerging non-volatile memory technolo...