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MICRO
2006
IEEE
102views Hardware» more  MICRO 2006»
13 years 11 months ago
Managing Distributed, Shared L2 Caches through OS-Level Page Allocation
This paper presents and studies a distributed L2 cache management approach through OS-level page allocation for future many-core processors. L2 cache management is a crucial multi...
Sangyeun Cho, Lei Jin
EGITALY
2006
13 years 7 months ago
Recovering 3D architectural information from dense digital models of buildings
In recent years the progress of 3D scanning technologies and the consequent growing commercialization of scanners opened a large spectrum of opportunities for many professionals. ...
A. Spinelli, Fabio Ganovelli, Claudio Montani, Rob...
MOBICOM
2003
ACM
13 years 10 months ago
DIRAC: a software-based wireless router system
Routers are expected to play an important role in the IPbased wireless data network. Although a substantial number of techniques have been proposed to improve wireless network per...
Petros Zerfos, Gary Zhong, Jerry Cheng, Haiyun Luo...
MICRO
2003
IEEE
116views Hardware» more  MICRO 2003»
13 years 10 months ago
Universal Mechanisms for Data-Parallel Architectures
Data-parallel programs are both growing in importance and increasing in diversity, resulting in specialized processors targeted at specific classes of these programs. This paper ...
Karthikeyan Sankaralingam, Stephen W. Keckler, Wil...
MICRO
2003
IEEE
109views Hardware» more  MICRO 2003»
13 years 10 months ago
TLC: Transmission Line Caches
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
Bradford M. Beckmann, David A. Wood