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» Equalized interconnects for on-chip networks: modeling and o...
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MICRO
2002
IEEE
171views Hardware» more  MICRO 2002»
13 years 10 months ago
Orion: a power-performance simulator for interconnection networks
With the prevalence of server blades and systems-ona-chip (SoCs), interconnection networks are becoming an important part of the microprocessor landscape. However, there is limite...
Hangsheng Wang, Xinping Zhu, Li-Shiuan Peh, Sharad...
SLIP
2006
ACM
13 years 11 months ago
Generation of design guarantees for interconnect matching
Manufacturable design requires matching of interconnects which have equal nominal dimensions. New design rules are projected to bring guarantee rules for interconnect matching. In...
Andrew B. Kahng, Rasit Onur Topaloglu
ISPASS
2009
IEEE
14 years 17 days ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
CCE
2004
13 years 5 months ago
A general modeling framework for the operational planning of petroleum supply chains
In the literature, optimization models deal with planning and scheduling of several subsystems of the petroleum supply chain such as oilfield infrastructure, crude oil supply, ref...
Sérgio M. S. Neiro, José M. Pinto
TPDS
2002
126views more  TPDS 2002»
13 years 5 months ago
P-3PC: A Point-to-Point Communication Model for Automatic and Optimal Decomposition of Regular Domain Problems
One of the most fundamental problems automatic parallelization tools are confronted with is to find an optimal domain decomposition for a given application. For regular domain prob...
Frank J. Seinstra, Dennis Koelma