7 search results - page 2 / 2 » Equivalence Checking Combining a Structural SAT-Solver, BDDs... |
ICCAD
2002
IEEE
14 years 1 months ago
2002
IEEE
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
CADE
2005
Springer
14 years 4 months ago
2005
Springer
We describe an algorithm for deciding the first-order multisorted theory BAPA, which combines 1) Boolean algebras of sets of uninterpreted elements (BA) and 2) Presburger arithmeti...