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ICCAD
1992
IEEE
137views Hardware» more  ICCAD 1992»
13 years 8 months ago
Equivalent design representations and transformations for interactive scheduling
High-level synthesis (HLS) requires more designer interaction to better meet the needs of experienced designers. However, attempts to create a highly interactive synthesis process...
Roger P. Ang, Nikil D. Dutt
RTAS
2008
IEEE
13 years 11 months ago
Equivalence between Schedule Representations: Theory and Applications
Multiprocessor scheduling problems are hard because of the numerous constraints on valid schedules to take into account. This paper presents new schedule representations in order ...
Matthieu Lemerre, Vincent David, Christophe Aussag...
ICECCS
2000
IEEE
135views Hardware» more  ICECCS 2000»
13 years 9 months ago
Definitions of Equivalence for Transformational Synthesis of Embedded Systems
Design of embedded systems is a complex task that requires design cycles founded upon formal notation, so that the synthesis from specification to implementation can be carried ou...
Luis Alejandro Cortés, Petru Eles, Zebo Pen...
TCAD
2008
93views more  TCAD 2008»
13 years 4 months ago
Transforming Cyclic Circuits Into Acyclic Equivalents
Abstract--Designers and high-level synthesis tools can introduce unwanted cycles in digital circuits, and for certain combinational functions, cyclic circuits that are stable and d...
Osama Neiroukh, Stephen A. Edwards, Xiaoyu Song
DAC
2012
ACM
11 years 7 months ago
Equivalence checking for behaviorally synthesized pipelines
Loop pipelining is a critical transformation in behavioral synthesis. It is crucial to producing hardware designs with acceptable latency and throughput. However, it is a complex ...
Kecheng Hao, Sandip Ray, Fei Xie