Sciweavers

21 search results - page 2 / 5
» Evaluating ASIC, DSP, and RISC Architectures for Embedded Ap...
Sort
View
MICRO
2002
IEEE
173views Hardware» more  MICRO 2002»
13 years 10 months ago
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
Christoforos E. Kozyrakis, David A. Patterson
VEE
2012
ACM
238views Virtualization» more  VEE 2012»
12 years 1 months ago
Swift: a register-based JIT compiler for embedded JVMs
Code quality and compilation speed are two challenges to JIT compilers, while selective compilation is commonly used to tradeoff these two issues. Meanwhile, with more and more Ja...
Yuan Zhang, Min Yang, Bo Zhou, Zhemin Yang, Weihua...
CASES
2004
ACM
13 years 11 months ago
A low power architecture for embedded perception
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
Binu K. Mathew, Al Davis, Michael Parker
SCOPES
2004
Springer
13 years 11 months ago
DSP Code Generation with Optimized Data Word-Length Selection
Digital signal processing applications are implemented in embedded systems with fixed-point arithmetic to minimize the cost and the power consumption. To reduce the application ti...
Daniel Menard, Olivier Sentieys
ESTIMEDIA
2003
Springer
13 years 10 months ago
Perception Coprocessors for Embedded Systems
Recognizing speech, gestures, and visual features are important interface capabilities for embedded mobile systems. Perception algorithms have many traits in common with more conv...
Binu K. Mathew, Al Davis, Ali Ibrahim