22 search results - page 2 / 5 » Evaluating the Use of Reference Run Models in Fault Injectio... |
BCS
2008
13 years 6 months ago
2008
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...
DDECS
2007
IEEE
13 years 11 months ago
2007
IEEE
Logic Soft Errors caused by radiation are a major concern when working with circuits that need to operate in harsh environments, such as space or avionics applications, where soft ...
DSN
2007
IEEE
13 years 11 months ago
2007
IEEE
The choice of error model used for robustness evaluation of Operating Systems (OSs) influences the evaluation run time, implementation complexity, as well as the evaluation preci...
QEST
2007
IEEE
13 years 11 months ago
2007
IEEE
Failure Mode and Effect Analysis (FMEA) is a method for assessing cause-consequence relations between component faults and hazards that may occur during the lifetime of a system. ...
CONNECTION
2004
13 years 5 months ago
2004
Evidence from recent psycholinguistic experiments suggests that humans resolve reference incrementally in the presence of constraining visual context. In this paper, we present an...