Sciweavers

3 search results - page 1 / 1
» Evolution of thread-level parallelism in desktop application...
Sort
View
ISCA
2010
IEEE
232views Hardware» more  ISCA 2010»
13 years 2 months ago
Evolution of thread-level parallelism in desktop applications
As the effective limits of frequency and instruction level parallelism have been reached, the strategy of microprocessor vendors has changed to increase the number of processing ...
Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mu...
ASPLOS
2000
ACM
13 years 8 months ago
Thread Level Parallelism and Interactive Performance of Desktop Applications
Multiprocessing is already prevalent in servers where multiple clients present an obvious source of thread-level parallelism. However, the case for multiprocessing is less clear f...
Krisztián Flautner, Richard Uhlig, Steven K...
HPCA
2005
IEEE
13 years 9 months ago
Chip Multithreading: Opportunities and Challenges
Chip Multi-Threaded (CMT) processors provide support for many simultaneous hardware threads of execution in various ways, including Simultaneous Multithreading (SMT) and Chip Mult...
Lawrence Spracklen, Santosh G. Abraham