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GECCO
2010
Springer
233views Optimization» more  GECCO 2010»
13 years 10 months ago
Evolutionary-based conflict-free scheduling of collective communications on spidergon NoCs
The Spidergon interconnection network has become popular recently in multiprocessor systems on chips. To the best of our knowledge, algorithms for collective communications (CC) h...
Jirí Jaros, Vaclav Dvorak
DATE
2003
IEEE
132views Hardware» more  DATE 2003»
13 years 10 months ago
Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
Youngchul Cho, Ganghee Lee, Sungjoo Yoo, Kiyoung C...
GECCO
2009
Springer
148views Optimization» more  GECCO 2009»
13 years 11 months ago
Evolutionary optimization of multistage interconnection networks performance
The paper deals with optimization of collective communications on multistage interconnection networks (MINs). In the experimental work, unidirectional MINs like Omega, Butterfly a...
Jirí Jaros
IWSOC
2005
IEEE
133views Hardware» more  IWSOC 2005»
13 years 10 months ago
Design Mapping, and Simulations of a 3G WCDMA/FDD Basestation Using Network on Chip
This paper presents a case study of a single-chip 3G WCDMA/FDD basestation implementation based on a circuit-switched network on chip. As the amount of transistors on a chip conti...
Daniel Wiklund, Dake Liu