13 search results - page 1 / 3 » Experience of Optimizing FFT on Intel Architectures |
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
Automatic library generators, such as ATLAS [11], Spiral [8] and FFTW [2], are promising technologies to generate efficient code for different computer architectures. The library...
IPPS
2008
IEEE
13 years 11 months ago
2008
IEEE
We present an auto-tuning approach to optimize application performance on emerging multicore architectures. The methodology extends the idea of searchbased performance optimizatio...
IPPS
2002
IEEE
13 years 9 months ago
2002
IEEE
Short vector SIMD instructions on recent microprocessors, such as SSE on Pentium III and 4, speed up code but are a major challenge to software developers. We present a compiler t...
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
TPDS
2008
13 years 4 months ago
2008
Multicore processors are an architectural paradigm shift that promises a dramatic increase in performance. But, they also bring an unprecedented level of complexity in algorithmic ...