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» Experience with Performing Architecture Tradeoff Analysis
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DAC
2003
ACM
13 years 9 months ago
Performance trade-off analysis of analog circuits by normal-boundary intersection
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...
Guido Stehr, Helmut E. Graeb, Kurt Antreich
ICECCS
1998
IEEE
168views Hardware» more  ICECCS 1998»
13 years 8 months ago
The Architecture Tradeoff Analysis Method
This paper presents the Architecture Tradeoff Analysis Method (ATAM), a structured technique for understanding the tradeoffs inherent in design. This method was developed to provi...
Rick Kazman, Mark H. Klein, Mario Barbacci, Thomas...
ISCA
2010
IEEE
314views Hardware» more  ISCA 2010»
13 years 9 months ago
Energy-performance tradeoffs in processor architecture and circuit design: a marginal cost analysis
Power consumption has become a major constraint in the design of processors today. To optimize a processor for energyefficiency requires an examination of energy-performance trade...
Omid Azizi, Aqeel Mahesri, Benjamin C. Lee, Sanjay...
GLOBECOM
2008
IEEE
13 years 10 months ago
Performance Metric Sensitivity Computation for Optimization and Trade-Off Analysis in Wireless Networks
Abstract—We develop and evaluate a new method for estimating and optimizing various performance metrics for multihop wireless networks, including MANETs. We introduce an approxim...
John S. Baras, Vahid Tabatabaee, George Papageorgi...
ASAP
2000
IEEE
184views Hardware» more  ASAP 2000»
13 years 8 months ago
Tradeoff Analysis and Architecture Design of a Hybrid Hardware/Software Sorter
Sorting long sequences of keys is a problem that occurs in many different applications. For embedded systems, a uniprocessor software solution is often not applicable due to the l...
Marcus Bednara, Oliver Beyer, Jürgen Teich, R...