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» Exploiting Idle Cycles for Algorithm Level Re-Computing
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2002
IEEE
122views Hardware» more  DATE 2002»
13 years 10 months ago
Exploiting Idle Cycles for Algorithm Level Re-Computing
Although algorithm level re-computing techniques can trade-off the detection capability of Concurrent Error Detection (CED) vs. time overhead, it results in 100% time overhead whe...
Kaijie Wu, Ramesh Karri
IPCCC
2007
IEEE
13 years 11 months ago
A Hybrid Disk-Aware Spin-Down Algorithm with I/O Subsystem Support
To offset the significant power demands of hard disk drives in computer systems, drives are typically powered down during idle periods. This saves power, but accelerates duty cyc...
Timothy Bisson, Scott A. Brandt, Darrell D. E. Lon...
ICC
2008
IEEE
124views Communications» more  ICC 2008»
13 years 11 months ago
Sidewalk: A RFID Tag Anti-Collision Algorithm Exploiting Sequential Arrangements of Tags
Abstract—Although predicting the RFID tag distribution before a read cycle begins would be generally difficult and even futile, a likely and interesting scenario is where the ta...
Hyunho Koh, Sangki Yun, Hyogon Kim
ISCA
2010
IEEE
185views Hardware» more  ISCA 2010»
13 years 10 months ago
Dynamic warp subdivision for integrated branch and memory divergence tolerance
SIMD organizations amortize the area and power of fetch, decode, and issue logic across multiple processing units in order to maximize throughput for a given area and power budget...
Jiayuan Meng, David Tarjan, Kevin Skadron
EMSOFT
2006
Springer
13 years 8 months ago
Compiler-assisted leakage energy optimization for clustered VLIW architectures
Miniaturization of devices and the ensuing decrease in the threshold voltage has led to a substantial increase in the leakage component of the total processor energy consumption. ...
Rahul Nagpal, Y. N. Srikant