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ICTAI
1997
IEEE
13 years 7 months ago
Exploiting Symbolic Techniques within Genetic Algorithms for Power Optimization
This paper proposes an optimization algorithm for reducing the power dissipation in a sequential circuit. The encoding of the different states in a Finite State Machine is modifie...
S. Chuisano, Fulvio Corno, Paolo Prinetto, Maurizi...
ATS
1997
IEEE
89views Hardware» more  ATS 1997»
13 years 8 months ago
Guaranteeing Testability in Re-encoding for Low Power
This paper considers the testability implications of low power design methodologies. Low power and high testability are shown to be highly contrasting requirements, and an optimiz...
Silvia Chiusano, Fulvio Corno, Paolo Prinetto, Mau...
VLSID
2002
IEEE
149views VLSI» more  VLSID 2002»
14 years 4 months ago
Functional Partitioning for Low Power Distributed Systems of Systems-on-a-Chip
In this paper, we present a functional partitioning method for low power real-time distributed embedded systems whose constituent nodes are systems-on-a-chip (SOCs). The systemlev...
Yunsi Fei, Niraj K. Jha
DAC
1998
ACM
13 years 8 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
AB
2007
Springer
13 years 10 months ago
Algorithmic Algebraic Model Checking IV: Characterization of Metabolic Networks
A series of papers, all under the title of Algorithmic Algebraic Model Checking (AAMC), has sought to combine techniques from algorithmic algebra, model checking and dynamical syst...
Venkatesh Mysore, Bud Mishra