5 search results - page 1 / 1 » Exploiting access semantics and program behavior to reduce s... |
ASPLOS
2008
ACM
13 years 6 months ago
2008
ACM
Integrating more processor cores on-die has become the unanimous trend in the microprocessor industry. Most of the current research thrusts using chip multiprocessors (CMPs) as th...
JSA
2008
13 years 4 months ago
2008
Conventional snoopy-based chip multiprocessors take an aggressive approach broadcasting snoop requests to all nodes. In addition each node checks all received requests. This appro...
CAL
2007
13 years 4 months ago
2007
Current on-chip block-centric memory hierarchies exploit access patterns at the fine-grain scale of small blocks. Several recently proposed memory hierarchy enhancements for coher...
MICRO
2007
IEEE
13 years 10 months ago
2007
IEEE
Current on-chip block-centric memory hierarchies exploit access patterns at the fine-grain scale of small blocks. Several recently proposed techniques for coherence traffic reduct...
ASPLOS
1998
ACM
13 years 8 months ago
1998
ACM
Optimizations aimed at reducing the impact of memory operations on execution speed have long concentrated on improving cache performance. These efforts achieve a reasonable level...