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ISLPED
2003
ACM
86views Hardware» more  ISLPED 2003»
11 years 10 months ago
Exploiting compiler-generated schedules for energy savings in high-performance processors
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
Madhavi Gopal Valluri, Lizy Kurian John, Heather H...
ICCD
2008
IEEE
192views Hardware» more  ICCD 2008»
12 years 2 months ago
Energy-aware opcode design
— Embedded processors are required to achieve high performance while running on batteries. Thus, they must exploit all the possible means available to reduce energy consumption w...
Balaji V. Iyer, Jason A. Poovey, Thomas M. Conte
CORR
2010
Springer
177views Education» more  CORR 2010»
11 years 2 months ago
Dynamic Scheduling of Skippable Periodic Tasks with Energy Efficiency in Weakly Hard Real-Time System
Energy consumption is a critical design issue in real-time systems, especially in battery- operated systems. Maintaining high performance, while extending the battery life between...
Santhi Baskaran, P. Thambidurai
CF
2005
ACM
11 years 7 months ago
An efficient wakeup design for energy reduction in high-performance superscalar processors
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...
Kuo-Su Hsiao, Chung-Ho Chen
ICCCN
2007
IEEE
11 years 11 months ago
An Energy-Efficient Scheduling Algorithm Using Dynamic Voltage Scaling for Parallel Applications on Clusters
In the past decade cluster computing platforms have been widely applied to support a variety of scientific and commercial applications, many of which are parallel in nature. Howev...
Xiaojun Ruan, Xiao Qin, Ziliang Zong, Kiranmai Bel...
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